• Number of LCD drive outputs: 96
• Supply voltage for LCD drive: Max +16V
• Supply voltage for the logic system: +2.5 to +5.5 V
• Low power consumption and low output impedance
• Display duty selectable by internal select register
• Low-power liquid crystal display power supply circuit equipped internally.
• Booster circuit (with Boost ratio of 2X/3X/4X/5X/6X)
• Regulator circuit
• Follower circuit
• Abundant command functions
LCD bias set, electronic volume, VSS voltage regulation internal resistor ratio and booster frequency.
All Functions have initial value, user can set by programmed.
• Package: 124-pin COB.
  (Segment mode)
• Shift clock frequency
  - 20 MHz (MAX.): VDD = +5.0 ¡Ó 0.5 V
  - 15 MHz (MAX.): VDD = +3.0 to + 4.5 V
  - 12 MHz (MAX.): VDD = +2.5 to + 3.0 V
• Adopts a data bus system
• 4-bit parallel / serial input modes are selectable by programmable.
• Automatic transfer function of an enable signal
• Automatic counting function which, in the chip selection mode, causes the internal clock to be stopped by automatically counting 16¡B32¡B48 ¡B64¡B80¡B96 bits of input data
• Line latch circuits are reset when XDISPOFF active (Common mode)
• Shift clock frequency: 4 MHz (MAX.)
• Built-in X-bit shift register
• Available in a single mode
• Y0->YX Single mode
  YX->Y0 Single mode
  PS:X=15¡B31¡B47¡B63¡B79¡B95
  The above 4 shift directions are register selectable
• Shift register circuits are reset when XDISPOFF active

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