• Number of LCD drive outputs: 80
• Supply voltage for LCD drive: Max +16V
• Supply voltage for the logic system: +2.5 to +5.5 V
• Low power consumption
• Package: 96-pin COB.
  (Segment mode)
• Shift clock frequency
  - 20 MHz (MAX.): VDD = +5.0 ¡Ó 0.5 V
  - 15 MHz (MAX.): VDD = +3.0 to + 4.5 V
  - 12 MHz (MAX.): VDD = +2.5 to + 3.0 V
• Adopts a data bus system
• 4-bit parallel / serial input modes are selectable with a mode (P/S) pin
• Automatic transfer function of an enable signal
• Automatic counting function which, in the chip selection mode, causes the internal clock to be stopped by automatically counting 80 bits of input data
• Line latch circuits are reset when XDISPOFF active

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